Investigation of a Novel Wiring Scheme for 700-1000-V HVIC´s

Author

Murray, A.F.J. ; Lane, W.A.

Author_Institution

Nat. Microelectron. Res. Centre, Univ. Coll., Cork, Ireland

fYear

1993

fDate

13-16 Sept. 1993

Firstpage

891

Lastpage

894

Abstract

This paper investigates isolation and wiring in a typical 700-1000-V, junction isolated (JI), high voltage integrated circuit (HVIC), process. It proposes a novel technique for running 1000-V wires over the isolation to other parts of the chip, without causing breakdown of the isolation itself or inducing unwanted parasitics.

Keywords

integrated circuit modelling; wires (electric); HVIC; high voltage integrated circuit process; voltage 700 V to 1000 V; wiring scheme; Circuit simulation; Costs; Doping; Educational institutions; Electric breakdown; Integrated circuit interconnections; Microelectronics; Voltage; Wire; Wiring;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid State Device Research Conference, 1993. ESSDERC '93. 23rd European

Conference_Location

Grenoble

Print_ISBN

2863321358

Type

conf

Filename

5435631

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1916323