• DocumentCode
    1916374
  • Title

    Permanent fault repair for FPGAs with limited redundant area

  • Author

    Yu, Shu-Yi ; McCluskey, Edward J.

  • Author_Institution
    Center for Reliable Comput., Stanford Univ., CA, USA
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    125
  • Lastpage
    133
  • Abstract
    FPGA fault repair schemes remove faulty elements from designs through reconfiguration. In designs with high FPGA utilization, a sufficient number of routable fault-free elements may not be available for permanent fault repair. We present a new permanent fault repair scheme, in which the original design is reconfigured into another fault tolerant design that has smaller area, so the damaged element can be avoided. Three new schemes that fully utilize available fault-free area and provide low impact on availability are presented. Analytical results show that our schemes improve availability compared to a module removal approach. which removes a redundant module when it becomes faulty
  • Keywords
    fault diagnosis; fault tolerance; field programmable gate arrays; logic CAD; network routing; redundancy; FPGAs; availability; fault tolerant design; permanent fault repair; reconfiguration; redundant area; redundant module; routable fault-free elements; Delay; Design automation; Fault detection; Fault tolerance; Fault tolerant systems; Field programmable gate arrays; Logic design; Nonvolatile memory; Reconfigurable logic; Routing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Defect and Fault Tolerance in VLSI Systems, 2001. Proceedings. 2001 IEEE International Symposium on
  • Conference_Location
    San Francisco, CA
  • ISSN
    1550-5774
  • Print_ISBN
    0-7695-1203-8
  • Type

    conf

  • DOI
    10.1109/DFTVS.2001.966761
  • Filename
    966761