• DocumentCode
    1916692
  • Title

    Comparison and application of different VHDL-based fault injection techniques

  • Author

    Gracia, J. ; Baraza, J.C. ; Gil, D. ; Gil, P.J.

  • Author_Institution
    Grupo de Sistemas Tolerantes a Fallos (GSTF), Univ. Politecnica de Valencia, Spain
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    233
  • Lastpage
    241
  • Abstract
    Compares different VHDL-based fault injection techniques: simulator commands, saboteurs and mutants for the validation of fault tolerant systems. Some extensions and implementation designs of these techniques have been introduced. Also, a wide set of non-usual fault models have been implemented. As an application, a fault tolerant microcomputer system has been validated. Faults have been injected using an injection tool developed by the GSTF. We have injected both transient and permanent faults on the system model, using two different workloads. We have studied the pathology of the propagated errors, measured their latencies, and calculated both detection and recovery coverages. Preliminary results show that coverages for transient faults can be obtained quite accurately with any of the three techniques. This enables the use of different abstraction level models for the same system. We have also verified significant differences in implementation and simulation cost between the studied injection techniques
  • Keywords
    fault tolerant computing; hardware description languages; system recovery; GSTF; VHDL-based fault injection techniques; abstraction level models; detection coverages; fault tolerant systems; microcomputer system; mutants; nonusual fault models; permanent faults; propagated errors; recovery coverages; saboteurs; simulation cost; simulator commands; transient faults; Circuit faults; Circuit simulation; Computational modeling; Computer simulation; Delay; Fault tolerant systems; Gas insulated transmission lines; Hardware; Microcomputers; Pathology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Defect and Fault Tolerance in VLSI Systems, 2001. Proceedings. 2001 IEEE International Symposium on
  • Conference_Location
    San Francisco, CA
  • ISSN
    1550-5774
  • Print_ISBN
    0-7695-1203-8
  • Type

    conf

  • DOI
    10.1109/DFTVS.2001.966775
  • Filename
    966775