A 0.18μm CMOS Direct RF Sampling Mixer for DECT Applications

Traditionally, transceivers for wireless communication have to be carefully optimized for a given implementation technology in order to meet design targets. This compromises scalability and analog circuits therefore have to be redesigned when a design is to migrate between technology nodes. The added cost from redesign is not acceptable for low cost applications such as DECT and alternative approaches need to be explored. This paper presents a direct RF sampling circuit that improves scalability. Using current-mode discrete-time signal processing the structure is able to reduce the effect of aliasing. The circuit is implemented in a standard 0.18μm CMOS process and measurements show that the overall principle is working. Further, the measured frequency response is in good agreement with theory. The implemented circuit provides for a gain of 18.5 dB, a noise figure of 17 dB, an iIP2 of 15.5 dBm and an IIP3 of -13.3 dBm. The circuit occupies an area of 2.5 mm² and the total power consumption is 14.4 mW