DocumentCode :
1916844
Title :
Design of Fourth Order Digital PLLs Using Filter Prototypes
Author :
Daniels, Brian ; Farrell, Ronan
Author_Institution :
Inst. of Microelectron. & Wireless Syst., Ireland Nat. Univ., Maynooth
fYear :
2006
fDate :
Nov. 2006
Firstpage :
243
Lastpage :
246
Abstract :
In this paper an investigation of different filter prototypes and their applicability to digital phase locked loop design is carried out. A novel design technique using the superior filter prototype for the 4th order digital PLL is also introduced. The optimum choice of each design parameter is considered, while maintaining realisable component values as a priority. Finally the proposed design technique is used to design a 4th order digital PLL with optimum filter cut-off, stability and lock time. This 4th order design method is an improvement on existing methods that exist in the literature to date, this is verified using simulation of a digital PLL designed using the proposed technique
Keywords :
digital filters; digital phase locked loops; filter prototypes; fourth order digital PLL; optimum filter cut-off; phase locked loop; Active filters; Digital filters; Frequency; Jitter; Low pass filters; Phase locked loops; Prototypes; Stability; Transfer functions; Voltage-controlled oscillators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Norchip Conference, 2006. 24th
Conference_Location :
Linkoping
Print_ISBN :
1-4244-0772-9
Type :
conf
DOI :
10.1109/NORCHP.2006.329220
Filename :
4126991
Link To Document :
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