DocumentCode
1917565
Title
Analysis of soft faults´ mathematical model based on resistive-inductive model of internal noises in VLSI
Author
Mandziy, Bohdan ; Vasiltsov, Ihor ; Bench, Andriy
Author_Institution
Radio Eng. Fac., Lviv Polytechic Nat. Univ., Ukraine
fYear
2002
fDate
2002
Firstpage
42
Abstract
A new model of resistive-inductive noise in VLSI chips was used to build a model of soft faults in logic gates. Dependences of soft fault probability of a single logical gate from the logic gate electrical characteristics, integrated circuit layout and environment temperature were investigated.
Keywords
VLSI; environmental degradation; failure analysis; fault diagnosis; integrated circuit modelling; integrated circuit noise; probability; IC layout; VLSI; VLSI chips; environment temperature; logic gate soft faults; resistive-inductive internal noise model; single logical gate electrical characteristics; soft fault mathematical model; soft fault probability; Circuit faults; Electric variables; Integrated circuit layout; Integrated circuit noise; Logic circuits; Logic gates; Mathematical model; Temperature dependence; Very large scale integration; Working environment noise;
fLanguage
English
Publisher
ieee
Conference_Titel
Modern Problems of Radio Engineering, Telecommunications and Computer Science, 2002. Proceedings of the International Conference
Print_ISBN
966-553-234-0
Type
conf
DOI
10.1109/TCSET.2002.1015848
Filename
1015848
Link To Document