An analog silicon retina with multi-chip configuration

The neuromorphic silicon retina is a novel analog very large scale integrated (VLSI) circuit that emulates the structure and the function of the retinal neuronal circuit. We fabricated a neuromorphic silicon retina in which sample/hold circuits were embedded to generate fluctuation-suppressed outputs in the previous study. This silicon retina, however, has a trade-off problem between the resolution and the computational complexity as the neuromorphic silicon retina generally does, since the photo sensors and processing circuits are fabricated on a single-ship. To solve the problem, we have designed a multi-chip silicon retina in which the functional network circuits are divided into two chips, the photoreceptor network chip (P chip) and the horizontal cell network chip (H chip). The output images of the chips are transferred to the H chip with analog voltages through line-parallel transfer bus. The sample/hold circuits embedded in the H chip compensate for the pattern noise generated on the transfer pathway. The number of pixels and the fill factor increased three times and twice as much as the previously fabricated chip, respectively.