DocumentCode
1917991
Title
A High Performance 0.4μm BiCMOS Technology for 16Mb Fast SRAMs
Author
Yamazaki, T. ; Suzuki, H. ; Yoshida, H. ; Nakamura, K. ; Kuhara, S. ; Kimura, T. ; Takada, M.
Author_Institution
ULSI Device Development Labs. and NEC Corporation, 1120 Shimokuzawa, Sagamihara, Kanagawa 229, Japan.
fYear
1994
fDate
11-15 Sept. 1994
Firstpage
191
Lastpage
194
Abstract
A high performance 0.4μm BiCMOS technology has been developed for fast 16Mb SRAMs. This technology includes a newly developed WIPEC(widely implanted pedestal collector) bipolar transistor. WIPEC can effectively prevent a 2D Kirk effect with minimizing the increase in base-collector junction capacitance. An address access time of 7ns was achieved for a 16Mb BiCMOS SRAM fabricated by using this technology.
Keywords
BiCMOS integrated circuits; Bipolar transistors; Capacitance; Cutoff frequency; Isolation technology; Kirk field collapse effect; Low voltage; MOSFETs; Random access memory; Thin film transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid State Device Research Conference, 1994. ESSDERC '94. 24th European
Conference_Location
Edinburgh, Scotland
Print_ISBN
0863321579
Type
conf
Filename
5435699
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