Title :
A novel poly-Si nanowire TFT for nonvolatile memory applications
Author :
Hsu, Hsin-Hwei ; Lin, Horng-Chih ; Huang, Jian-Fu ; Huang, Tiao-Yuan
Author_Institution :
Dept. of Electron. Eng. & Inst. of Electron., Nat. Chiao Tung Univ., Hsinchu
Abstract :
A novel ploy-Si nanowire TFT-SONOS device configured with independent double-gate structure was fabricated and characterized. The electrical characteristics including programming and erasing properties were studied. Adding an adequate top-gate bias was found to improve the programming efficiency, resulting in larger memory window.
Keywords :
nanowires; silicon; Si; independent double-gate structure; nanowires; nonvolatile memory applications; top-gate bias; Biosensors; Electric variables; Energy consumption; Fabrication; Flat panel displays; Laboratories; Nanoscale devices; Nonvolatile memory; Silicon; Thin film transistors;
Conference_Titel :
Memory Technology, Design and Testing, 2007. MTDT 2007. IEEE International Workshop on
Conference_Location :
Taipei
Print_ISBN :
978-1-4244-1656-1
Electronic_ISBN :
1087-4852
DOI :
10.1109/MTDT.2007.4547618
