A SIMD Parallelization Method for an Application for LSI Logic Simulation

Author

Kai, Natsuki ; Nishinohara, Ryoji ; Koide, Hiroshi

Author_Institution

Grad. Sch. of Comput. Sci. & Syst. Eng., Kyushu Inst. of Technol., Iizuka, Japan

fYear

2012

fDate

10-13 Sept. 2012

Firstpage

375

Lastpage

381

Abstract

This paper proposes and evaluates a SIMD parallelization method for an application for LSI logic simulation. The proposal method converts a net list into a parallel and distributed program code so as to make the code SIMD parallelized. As experiments to evaluate our proposal method, tasks in SIMD arithmetic logical units on Cell/B.E., and we measure that elapsed time. In the results of experiments, over 80% tasks are SIMD parallelized and the program with a shuffle instruction and a SIMD instruction reduces computation time by over 90%.

Keywords

large scale integration; logic simulation; parallel programming; program compilers; Cell/B.E; LSI logic simulation; SIMD arithmetic logical units; SIMD instruction; SIMD parallelization method; computation time; distributed program code; parallel program code; shuffle instruction; Computational modeling; Computer architecture; Integrated circuit modeling; Large scale integration; Proposals; Prototypes; Parallel and distributed program; Resource allocation and management; SIMD instruction; Scheduling for a task graph;

fLanguage

English

Publisher

ieee

Conference_Titel

Parallel Processing Workshops (ICPPW), 2012 41st International Conference on

Conference_Location

Pittsburgh, PA

ISSN

1530-2016

Print_ISBN

978-1-4673-2509-7

Type

conf

DOI

10.1109/ICPPW.2012.54

Filename

6337504