A Comparative Study of Three Designs for Sub Half Micron Buried p-channel MOSFET

This paper reports a comparison between three designs of p-channel MOSFETs processed with n+ doped polysilicon gates. Two new techniques to reduce DIBL of buried channel pMOSFETs are proposed and compared with a conventional approach. Criteria for this comparison are the short channel effect control, the off-state leakage current, the holding voltage and the saturation drain current. Based on extensive simulations and experimental work, a 0.30 ¿m physical gate length device with weak DIBL and high drivability is achieved.