• DocumentCode
    1918964
  • Title

    AMULET3i-an asynchronous system-on-chip

  • Author

    Garside, J.D. ; Bainbridge, W.J. ; Bardsley, A. ; Clark, D.M. ; Edwards, D.A. ; Furber, S.B. ; Liu, J. ; Lloyd, D.W. ; Mohammadi, S. ; Pepper, J.S. ; Petlin, O. ; Temple, S. ; Woods, J.V.

  • Author_Institution
    Dept. of Comput. Sci., Manchester Univ., UK
  • fYear
    2000
  • fDate
    2000
  • Firstpage
    162
  • Lastpage
    175
  • Abstract
    AMULET3i is the third generation asynchronous ARM-compatible microprocessor subsystem developed at the University of Manchester. It is internally modular being based around the MARBLE asynchronous on-chip bus, and is also extensible through the addition of conventional clocked synthesizable peripherals via an on-chip synchronous peripheral bus. As such it is capable of forming the core of a wide range of system-on-chip applications, bringing asynchronous design into commercial use in a flexible and easy-to-use configuration. Its performance and area are comparable with clocked equivalents, and its low-power and electromagnetic emission characteristics give it unique capabilities in appropriate applications
  • Keywords
    logic design; microprocessor chips; AMULET3i; ARM-compatible microprocessor subsystem; MARBLE asynchronous on-chip bus; asynchronous system-on-chip; clocked equivalents; clocked synthesizable peripherals; electromagnetic emission characteristics; synchronous peripheral bus; Bridges; Communication system control; Control systems; Microprocessors; Random access memory; Read only memory; Read-write memory; Software testing; System-on-a-chip; Telecommunication control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Advanced Research in Asynchronous Circuits and Systems, 2000. (ASYNC 2000) Proceedings. Sixth International Symposium on
  • Conference_Location
    Eilat
  • ISSN
    1522-8681
  • Print_ISBN
    0-7695-0586-4
  • Type

    conf

  • DOI
    10.1109/ASYNC.2000.836999
  • Filename
    836999