Title :
A high aspect ratio via hole dry etching technology for high power GaAs MESFET
Author :
Sumitani, K. ; Komaru, M. ; Kobiki, M. ; Higaki, Y. ; Mitsui, Y. ; Takano, H. ; Nishitani, K.
Author_Institution :
Mitsubishi Electr. Corp., Hyogo, Japan
Abstract :
The dry etching technique is investigated to achieve high-aspect-ratio via holes with smooth inner surface for the application of high-power GaAs MESFET with the source island via hole (SIV) structure. Mask materials and etching conditions are optimized to obtain a high aspect ratio of 2.6. The uniformity of the etched depth is +or-3.5% deviation across a 3-in wafer, and the reproducibility is +or-5.5% deviation. This technique allows the SIV FET with dry etched via holes to realize a packing density 1.7 times higher than that of conventional FETs. At 18 GHz, the SIV FET with 1350- mu m gate width provides a power output of 26.2 dBm at 1-dB gain compression and a linear power gain of 7.5 dB.<>
Keywords :
III-V semiconductors; MMIC; Schottky gate field effect transistors; field effect integrated circuits; gallium arsenide; integrated circuit technology; power integrated circuits; power transistors; solid-state microwave devices; sputter etching; 1350 micron; 18 GHz; 3 in; 7.5 dB; GaAs; RIE; dry etched via holes; dry etching technique; dry etching technology; etched depth; etching conditions; gain compression; gate width; high power GaAs MESFET; high-aspect-ratio via holes; mask materials; packing density; power gain; power output; reproducibility; semiconductors; smooth inner surface; source island via hole; uniformity; Dry etching; Fingers; Gain; Gallium arsenide; MESFETs; MMICs; Microwave FETs; Radio frequency; Reproducibility of results; Thermal resistance;
Conference_Titel :
Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1989. Technical Digest 1989., 11th Annual
Conference_Location :
San Diego, CA, USA
DOI :
10.1109/GAAS.1989.69327
