DocumentCode :
1919039
Title :
Improving Three-Dimensional Semiconductor Modeling through Layout and Process Flow Analysis
Author :
Westermann, M. ; Regli, P. ; Strecker, N. ; Fichtner, W.
Author_Institution :
Integrated Systems Laboratory, Swiss Fed. Inst. of Technology, CH-8092 Zurich
fYear :
1994
fDate :
11-15 Sept. 1994
Firstpage :
351
Lastpage :
354
Abstract :
Constructive Solid Geometry (CSG) is a solid modeling technique widely used for the design of semiconductor devices. With the simulation domain subdivision algorithm presented in this paper, the minimal number of solid modeling operations is required in order to build a three-dimensional (3D) device structure. The algorithm is based on a drawing method which combines information on photolithographic masks into a color raster. In this way, solid modeling operations are performed only once on regions having the same color.
Keywords :
Buildings; Composite materials; Computational modeling; Data structures; Etching; Geometry; Laboratories; Ligaments; Semiconductor devices; Solid modeling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid State Device Research Conference, 1994. ESSDERC '94. 24th European
Conference_Location :
Edinburgh, Scotland
Print_ISBN :
0863321579
Type :
conf
Filename :
5435734
Link To Document :
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