Application of Optical, X-Ray and E-Beam Lithography Options to 0.18 Micron Silicon FET Technology

This paper reports on a device integration experiment in which 0.18 micron gate length silicon FETs are fabricated using three alternative gate lithography approaches based, respectively, on optical, x-ray and e-beam techniques. Details of device fabrication procedures including the critical gate lithography steps are presented along with an assessment of the electrical characteristics of the completed devices. Work on 0.18 micron devices is particularly important for future 1Gbit DRAM circuits and their logic derivatives.