Title :
P1–9: A driving circuit system with high voltage output for FED
Author :
Gao, Liu ; Deng, Shaozhi
Author_Institution :
State Key Lab. of Optoelectron. Mater. & Technol., Sun Yat-sen Univ., Guangzhou, China
Abstract :
A FED driving circuit system with adjustable parameters, resources optimizing, voltage output with 420 V, giving support to 640×3×480 resolution is presented. In the circuit system, the following design methode was introduced: double buffer, internal dual-port distributed RAM, and low-voltage differential signaling (LVDS) interface.
Keywords :
driver circuits; field emission displays; random-access storage; FED; double buffering; driving circuit system; high voltage output; internal dual-port distributed RAM; low-voltage differential signaling; voltage 420 V; Driver circuits; Field programmable gate arrays; Integrated circuit modeling; Pixel; Random access memory; Streaming media; Testing; Driving circuit system; FPGA; Field emission display; High voltage output;
Conference_Titel :
Vacuum Nanoelectronics Conference (IVNC), 2010 23rd International
Conference_Location :
Palo Alto, CA
Print_ISBN :
978-1-4244-7889-7
Electronic_ISBN :
978-1-4244-7888-0
DOI :
10.1109/IVNC.2010.5563158
