Architectural Tradeoffs in the Design of Barrel Shifters for Reconfigurable Computing

Barrel shifters are utilized by special and general-purpose arithmetic units to manipulate data. Several types of shifting operations exist depending on the target application, including shift logical, shift arithmetic and rotate. In this work a set of hardware design alternatives for shifters to perform the different types of shifting operations was analyzed, designed and implemented in a Virtex-4- FPGA. The results show that several implementations with different trade-offs between performance and area can be obtained and that high throughput can be achieved using pipelining techniques.