DocumentCode :
1921179
Title :
Power Savings in FPGA Video Compression Systems through Intra Prediction Result Reuse
Author :
Stewart, Graeme ; Renshaw, David ; Riley, Marlyn
Author_Institution :
Inst. for Syst. Level Integration, Livingston
fYear :
2008
fDate :
26-28 March 2008
Firstpage :
161
Lastpage :
166
Abstract :
A novel algorithm is proposed to reduce the power used performing the motion estimation and reference frame loading operations required by a video encoder. The algorithm uses the results of the intra prediction encoding stage to determine the data propagation direction which minimises the data´s transition activity. A motion estimation architecture which can adaptively change the direction data is propagated through it is proposed and the power saved using the algorithm is estimated. Results are given showing a power saving of upto 8%.
Keywords :
data compression; field programmable gate arrays; motion estimation; video coding; FPGA video compression systems; data propagation direction; data transition activity; intra prediction encoding stage; intra prediction result reuse; motion estimation; power savings; reference frame loading operation; Application specific integrated circuits; Bandwidth; Computer architecture; Costs; Decoding; Encoding; Field programmable gate arrays; Logic; Motion estimation; Video compression;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Programmable Logic, 2008 4th Southern Conference on
Conference_Location :
San Carlos de Bariloche
Print_ISBN :
978-1-4244-1992-0
Type :
conf
DOI :
10.1109/SPL.2008.4547749
Filename :
4547749
Link To Document :
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