Title :
Circuit techniques for high-speed and low-power multi-port SRAMs
Author :
Khellah, Muhammad M. ; Elmasry, M.I.
Author_Institution :
Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada
Abstract :
This paper presents a new approach based on current-mode to reduce the energy and improve the speed of write and read accesses in multi-port SRAMs. The design of a pipelined 32×64 register file that utilizes the above technique is described. Simulation results in a 0.6 μm CMOS technology show that the register file can operate at a 500 MHz frequency using a 2.3 V supply
Keywords :
CMOS memory circuits; SRAM chips; high-speed integrated circuits; low-power electronics; pipeline processing; 0.6 micron; 2.3 V; 500 MHz; CMOS static RAM; circuit techniques; current-mode approach; high-speed multiport SRAMs; low-power multi-port SRAMs; pipelined register file; Bandwidth; CMOS technology; Circuits; Clocks; Frequency; Pipeline processing; Random access memory; Registers; Voltage; Writing;
Conference_Titel :
ASIC Conference 1998. Proceedings. Eleventh Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-4980-6
DOI :
10.1109/ASIC.1998.722823
