Title :
65 nm Transistors for a 90 nm CMOS SOC Platform
Author :
Mirabedini, M.R. ; Gopinath, V.P. ; Kamath, A. ; Lee, M.Y. ; Yeh, W.C.
Author_Institution :
LSI Logic Corporation, Santa Clara, USA
fDate :
24-26 September 2002
Keywords :
Boron; CMOS logic circuits; CMOS process; CMOS technology; Dielectric devices; Implants; Leakage current; Nickel; Silicides; Silicon;
Conference_Titel :
Solid-State Device Research Conference, 2002. Proceeding of the 32nd European
Print_ISBN :
88-900847-8-2
DOI :
10.1109/ESSDERC.2002.194887
