Title :
Statistical Worst-Case Analysis Techniques for CMOS Technology Using Design of Experiments
Author :
Clancy, R. ; Welten, M. ; Wall, L. ; Power, L.A. ; Mason, B. ; Stribley, P. ; Son, A. Mathew
Author_Institution :
National Microelectronics Research Centre, University College Cork, IRELAND.
Abstract :
This paper describes an approach to the major issues of Design for Manufacturability (DFM) based on Principal Component Analysis and Design of Experiments techniques, which has been formulated and implemented for a 1¿m CMOS technology, culminating in the generation of realistic nominal and worst-case model parameter sets.
Keywords :
CMOS technology; Circuit simulation; Educational institutions; Fluctuations; Microelectronics; Predictive models; Principal component analysis; Pulp manufacturing; Semiconductor device modeling; Virtual manufacturing;
Conference_Titel :
Solid State Device Research Conference, 1994. ESSDERC '94. 24th European
Conference_Location :
Edinburgh, Scotland
