SVM learning with fixed-point math

We present in this paper an algorithm for Support Vector Machine (SVM) learning, which can be implemented using fixed-point math. The advantages of the fixed-point representation, respect to the more common floating-point one, allows us to address digital VLSI implementations of SVM. In particular, simple algorithms and simple architectures can be exploited for targeting programmable devices like Field Programmable Gate Arrays (FPGAs), which are the basis of many embedded systems. This paper focuses on the SVM learning algorithm: for the complete version of this work, including an actual FPGA realization.