DocumentCode :
1923920
Title :
InAs/AlSb Dual-Gate HFETs with High Maximum Drain Bias
Author :
Bolognesi, C.R. ; Dvorak, M.W. ; Chow, D.H.
Author_Institution :
Compound Semiconductor Device Laboratory, School of Engineering Science, Simon Fraser University, Burnaby BC, V5A 1S6, Canada; Physics Department, Simon Fraser University, Burnaby BC, V5A 1S6, Canada
fYear :
1996
fDate :
9-11 Sept. 1996
Firstpage :
885
Lastpage :
888
Abstract :
We report the implementation of InAs/AlSb dual-gate (DG) HFETs fabricated by conventional optical lithography, and consisting of two electrically distinct 1 ¿m gates with a 1 ¿m intergate separation. The DG-HFETs feature well-behaved, kink-free drain characteristics, and exhibit both a high transconductance and a low output conductance when compared to single-gate HFETs. We find that dual-gate operation significantly reduces short-channel effects, and increases the maximum allowable drain bias.
Keywords :
Electron mobility; FETs; Gallium arsenide; HEMTs; Laboratories; MODFETs; Optical scattering; Semiconductor devices; Substrates; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid State Device Research Conference, 1996. ESSDERC '96. Proceedings of the 26th European
Conference_Location :
Bologna, Italy
Print_ISBN :
286332196X
Type :
conf
Filename :
5435941
Link To Document :
بازگشت