DocumentCode :
1923954
Title :
Guard ring effect for through silicon via (TSV) noise coupling reduction
Author :
Cho, Jonghyun ; Yoon, Kihyun ; Pak, Jun So ; Kim, Joohee ; Lee, Junho ; Lee, Hyungdong ; Park, Kunwoo ; Kim, Joungho
Author_Institution :
Terahertz Interconnection & Package Lab., KAIST, Daejeon, South Korea
fYear :
2010
fDate :
24-26 Aug. 2010
Firstpage :
1
Lastpage :
4
Abstract :
In 3-dimensional integrated circuit (3D-IC) using through silicon via (TSV), TSV noise coupling is one of the most significant considerations for circuit design. For 2-dimensional system, p+ guard ring and deep n-well is used for substrate noise coupling suppression, but the effect of these shielding techniques is not studied in 3D-IC. In this paper, the noise isolation effect of p+ guard ring in 3D-IC is validated using the TSV noise coupling model and 3D-field solver. Additionally deep n-well guard ring is proposed for more noise isolation, and validated by the TSV noise coupling model. It has more noise isolation than p+ guard ring at frequencies over several GHz.
Keywords :
integrated circuit design; integrated circuit noise; three-dimensional integrated circuits; 3-dimensional integrated circuit; 3D-IC; 3D-field solver; circuit design; deep n-well guard ring; guard ring effect; noise isolation effect; p+ guard ring; through silicon via noise coupling reduction; Capacitance; Couplings; Noise; Silicon; Substrates; Through-silicon vias; Transfer functions;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
CPMT Symposium Japan, 2010 IEEE
Conference_Location :
Tokyo
Print_ISBN :
978-1-4244-7593-3
Type :
conf
DOI :
10.1109/CPMTSYMPJ.2010.5679531
Filename :
5679531
Link To Document :
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