DocumentCode
1924992
Title
Ultra low on-resistance SBD with p-buried floating layer
Author
Saitoh, Wataru ; Omura, Ichiro ; Tokano, Ken´ichi ; Ogura, Tsuneo ; Ohashi, Hiromichi
Author_Institution
Semicond. Co., Toshiba Corp., Kawasaki, Japan
fYear
2002
fDate
2002
Firstpage
33
Lastpage
36
Abstract
A novel low on-resistance Schottky barrier diode (SBD) structure with a p-buried floating layer is proposed and demonstrated by fabricating 300V-SBDs using a burying epitaxial growth technique. The fabricated SBDs realize 50% reduction in chip area and show the possibility of a higher SBD blocking voltage of over 200 V thanks to the reduction of the on-resistance. This is the first paper describing fabrication of charge compensated SBDs.
Keywords
Schottky diodes; buried layers; electric resistance; vapour phase epitaxial growth; 200 V; 300 V; Schottky barrier diode structure; blocking voltage; buried structure; burying epitaxial growth technique; charge compensation; chip area; on-resistance; p-buried floating layer; ultra low on-resistance SBD; Anodes; Boron; Cathodes; Epitaxial growth; MOSFET circuits; Power MOSFET; Schottky barriers; Schottky diodes; Semiconductor diodes; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Power Semiconductor Devices and ICs, 2002. Proceedings of the 14th International Symposium on
Print_ISBN
0-7803-7318-9
Type
conf
DOI
10.1109/ISPSD.2002.1016164
Filename
1016164
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