DocumentCode :
1925034
Title :
Collimation, The Solution to Push Standard Ti-TiN PVD to 0.35μm Technology
Author :
Lerme, M. ; Ulmer, L. ; Morand, Y. ; Van De Goor, A. ; Le Contellec, M. ; Normandon, P. ; Gayet, P.
Author_Institution :
GRESSI-LETI DMEL-CENG, 17 rue des Martyrs 38054 GRENOBLE Cedex 9 France
fYear :
1995
fDate :
25-27 Sept. 1995
Firstpage :
127
Lastpage :
130
Abstract :
This paper reports the results obtaines with a collimated PVD Ti/TiN barrier layer used for contacts on TiSi2 in a 0.35μm technology. The collimated process is compared with the standard PVD one, in terms of electrical performances measured on CMOS wafers. The influence of an anneal after the baffler deposition is also studied. We have shown that the collimated process, contrary to the standard one, is able to meet the requirements of a 0.35 μm technology. A RTP treatment performed after the barrier deposition is needed to achieve low contact resistances and good yields measured on contacts strings.
Keywords :
Annealing; Atherosclerosis; CMOS process; CMOS technology; Collimators; Contacts; Electric variables measurement; Measurement standards; Performance evaluation; Tin;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid State Device Research Conference, 1995. ESSDERC '95. Proceedings of the 25th European
Conference_Location :
The Hague, The Netherlands
Print_ISBN :
286332182X
Type :
conf
Filename :
5435991
Link To Document :
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