Title :
A technology mapper for Xilinx FPGAs
Author :
Chikodikar, Madhav Y. ; Laddha, Shridhar ; Sirasao, Ashish
Author_Institution :
Silicon Automation Syst., Bangalore, India
Abstract :
This paper presents a method for area optimal technology mapping for Xilinx FPGAs. The method is modification of the method described previously and covers uniformly XC2000, XC3000 and XC4000 series of Xilinx FPGAs. The method addresses mapping of combinational and sequential logic onto Xilinx FPGAs. The results compare favorably with the existing mappers and the CLB estimates provided by the mapper are comparable with the CLB count obtained after passing the circuit through the Xilinx implementation kit
Keywords :
circuit CAD; combinational circuits; field programmable gate arrays; integrated circuit design; logic CAD; sequential circuits; XC2000 series; XC3000 series; XC4000 series; Xilinx FPGAs; area optimal technology mapping; combinational logic; sequential logic; technology mapper; Algorithm design and analysis; Automation; Delay estimation; Field programmable gate arrays; Logic circuits; Phase estimation; Programmable logic arrays; Routing; Silicon; Table lookup;
Conference_Titel :
VLSI Design, 1997. Proceedings., Tenth International Conference on
Conference_Location :
Hyderabad
Print_ISBN :
0-8186-7755-4
DOI :
10.1109/ICVD.1997.567961
