Low Power CMOS High Speed Dual-Modulus 15/16 Prescaler for Wireless Communications

Author

Liu, Huimin ; Zhang, Xiaoxing ; Dai, Yujie ; Lv, Yingjie

Author_Institution

IC Design Center, Nankai Univ., Tianjin, China

fYear

2011

fDate

18-20 April 2011

Firstpage

397

Lastpage

400

Abstract

This paper introduces a high speed, low power CMOS 15/16 dual-modulus prescaler (DMP) based on true single-phase-clock (TSPC) and transmission gates (TGs) cell. A glitch elimination TSPC is used in the synchronous counter. TGs are used in the critical path. The DMP circuit implemented in 0.18μm CMOS process. The simulation results are provided. It shows wide operating frequency from 0.5GHz to 3.125GHz. It consumes 4.23mW with 1.8V power supply voltage at 3.125GHz.

Keywords

CMOS digital integrated circuits; clocks; low-power electronics; microwave integrated circuits; prescalers; radiocommunication; frequency 0.5 GHz to 3.125 GHz; glitch elimination true single-phase-clock; low power CMOS high speed dual-modulus 15-16 prescaler; power 4.23 mW; size 0.18 mum; synchronous counter; transmission gates cell; voltage 1.8 V; wireless communications; CMOS integrated circuits; CMOS technology; Clocks; Delay; Frequency synthesizers; Logic gates; Radiation detectors; dual-modulus prescaler (DMP); transmission gate (TG); true single-phase-clock (TSPC);

fLanguage

English

Publisher

ieee

Conference_Titel

Communications and Mobile Computing (CMC), 2011 Third International Conference on

Conference_Location

Qingdao

Print_ISBN

978-1-61284-312-4

Type

conf

DOI

10.1109/CMC.2011.58

Filename

5931258