Title :
A Triple-well Architecture for Low-voltage Operation in Submicron CMOS Devices
Author :
Auricchio, C. ; Bez, R. ; Losavio, A. ; Maurelli, A. ; Sala, C. ; Zabberoni, P.
Author_Institution :
SGS-Thomson Microelectronics, Central R&D, Via C. Olivetti 2 - 20041 Agrate Brianza - ITALY
Abstract :
In this work, we present an investigation of a triple-well process architecture for sub-half- micron CMOS technologies. The characterization presented here includes simulation of the manufacturing process as well as an evaluation of the electrical performance of the triple-well structures, active devices and parasitic elements.
Keywords :
Bipolar transistors; CMOS process; CMOS technology; Diodes; Implants; Low voltage; Manufacturing processes; Microelectronics; Research and development; Thyristors;
Conference_Titel :
Solid State Device Research Conference, 1996. ESSDERC '96. Proceedings of the 26th European
Conference_Location :
Bologna, Italy
