Title :
A fast digital cluster finder and processor for high energy physics
Author :
Bylsma, B. ; Durkin, L.S. ; Larsen, D. ; Lic, C. ; Ling, T.Y. ; Park, S. ; Rush, C. ; Sehgal, V. ; Seidlein, R. ; Romanowski, T.A.
Abstract :
A hardwired processor dedicated to trigger processing in a typical modern high-energy physics experiment is described. Within this constraint, an attempt is made to maintain maximum flexibility. Programmable logic and programmable gate arrays are used extensively, which allow improvements to be made without wiring changes. User-loadable lookup tables are used where possible to allow custom tweaking of the data processing. Examples from ZEUS and SDC are given to show how the basic architecture can be customized to these applications
Keywords :
logic arrays; physics computing; trigger circuits; SDC; ZEUS; fast digital cluster finder; hardwired processor; lookup tables; programmable gate arrays; programmable logic arrays; trigger processing; Clocks; Clustering algorithms; Fastbus; Geometry; Hardware; Instruments; Pipelines; Programmable logic arrays; Proposals; Throughput;
Conference_Titel :
Nuclear Science Symposium and Medical Imaging Conference, 1992., Conference Record of the 1992 IEEE
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-0884-0
DOI :
10.1109/NSSMIC.1992.301237
