DocumentCode :
1929459
Title :
FASTBUS Standard Routines implementation for Fermilab embedded processor boards
Author :
Pangburn, J. ; Patrick, J. ; Kent, S. ; Oleynik, G. ; Pordes, R. ; Votava, M. ; Heyes, G. ; Watson, W.A., III
Author_Institution :
Fermilab. Astrophys. Center, Batavia, IL, USA
fYear :
1992
fDate :
25-31 Oct 1992
Firstpage :
528
Abstract :
In collaboration with CEBAF, Fermilab´s Online Support Department and the CDF experiment have produced a new implementation of the IEEE FASTBUS Standard Routines for two embedded processor FASTBUS boards: the Fermilab Smart Crate Controller (FSCC) and the FASTBUS Readout Controller (FRC). Features of this implementation include portability to other embedded processor boards, remote source-level debugging, high speed, optional generation of very-high-speed code for readout applications, and built-in Sun RPC support for execution of FASTBUS transactions and lists over the network
Keywords :
physics computing; standards; system buses; FASTBUS Readout Controller; Fermilab Smart Crate Controller; IEEE FASTBUS Standard Routines; embedded processor boards; remote source-level debugging; Code standards; Data acquisition; Debugging; Fastbus; Libraries; Online Communities/Technical Collaboration; Power capacitors; Process control; Real time systems; Sun;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nuclear Science Symposium and Medical Imaging Conference, 1992., Conference Record of the 1992 IEEE
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-0884-0
Type :
conf
DOI :
10.1109/NSSMIC.1992.301320
Filename :
301320
Link To Document :
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