DocumentCode
1930151
Title
An efficient systolic array for the discrete cosine transform based on prime-factor decomposition
Author
Lim, Hyesook ; Swartzlander, Earl E.
Author_Institution
Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
fYear
1995
fDate
2-4 Oct 1995
Firstpage
644
Lastpage
649
Abstract
A new design of a systolic array for computing the discrete cosine transform (DCT) based on prime-factor decomposition is presented. The basic principle of the proposed systolic array is that one-dimensional (1-D) DCT can be decomposed to a 2-dimensional (2-D) DCT by input and output index mappings and the 2-D DCT is computed efficiently on a 2-D systolic array. We modify Lee´s input index mapping method in order to construct one input mapping table instead of three input index mapping tables. The proposed systolic array avoids the need for the array transposer that was required by earlier implementations for the prime-factor DCT algorithms, and thus all processing can be pipelined. The proposed design of systolic array provides a simple and regular structure, which is well suited for VLSI implementation
Keywords
VLSI; array signal processing; discrete cosine transforms; systolic arrays; VLSI implementation; discrete cosine transform; index mappings; prime-factor decomposition; systolic array; Array signal processing; Computer architecture; Delay; Discrete cosine transforms; Discrete transforms; Signal processing algorithms; Speech processing; Systolic arrays; Throughput; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Design: VLSI in Computers and Processors, 1995. ICCD '95. Proceedings., 1995 IEEE International Conference on
Conference_Location
Austin, TX
ISSN
1063-6404
Print_ISBN
0-8186-7165-3
Type
conf
DOI
10.1109/ICCD.1995.528936
Filename
528936
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