Title :
A CMOS 6-bit, 1 GHz ADC for IF sampling applications
Author :
Uyttenhove, K. ; Steyaert, M.
Author_Institution :
ESAT-MICAS, Katholieke Univ. Leuven, Heverlee, Belgium
Abstract :
The design plan and measurement results of a very high speed 6-bit CMOS Flash Analog-to-digital converter (ADC) are presented. The very high acquisition speed is obtained by improved comparator design and optimized pre-amplifier design. At these high frequencies power-efficient error correction logic is necessary. Measurements show the high conversion speed of the ADC. Maximum acquisition speed is above 1 GHz.
Keywords :
CMOS integrated circuits; analogue-digital conversion; high-speed integrated circuits; 1 GHz; 6 bit; CMOS flash analog-to-digital converter; IF sampling; acquisition speed; comparator; conversion speed; design optimization; error correction logic; power efficiency; pre-amplifier; Analog-digital conversion; Circuits; Clocks; Delay; Error analysis; Frequency; Preamplifiers; Read only memory; Sampling methods; Velocity measurement;
Conference_Titel :
Microwave Symposium Digest, 2001 IEEE MTT-S International
Conference_Location :
Phoenix, AZ, USA
Print_ISBN :
0-7803-6538-0
DOI :
10.1109/MWSYM.2001.967335
