Area and power efficient mismatched filters based on sidelobe inversion

A computationally efficient mismatched filter comprised of a matched filter in cascade with a multi-stage filter based on sidelobe inversion is proposed. For this approach to work, the autocorrelation of the given code has to satisfy certain conditions that are derived in this work. If in addition, the sidelobes are sparse and of small integer values, such as in Barker codes and Huffman sequences, then the proposed filters are shown to be computationally very efficient. When implemented in VLSI, they require significantly smaller chip area and consume less power compared to the length-optimal filters achieving comparable sidelobe suppression.