Matching properties of CMOS SOI transistors

Author

Thissen, Ph ; Verleysen, M. ; Legat, J.-D.

Author_Institution

Lab. de Microelectron., Univ. Catholique de Louvain, Belgium

fYear

1994

fDate

26-28 Sep 1994

Firstpage

134

Lastpage

137

Abstract

Analog implementations of neural networks have shown promising results; the main drawback of such techniques is the limited accuracy available in standard analog technologies. A test circuit composed of 256 N-channel and P-channel transistors has been designed and tested in an SOI (Silicon-On-Insulator) CMOS 3 μm technology. This paper describes the matching properties of these current sources. We present results about mismatching depending on proximity and operating conditions. We also propose a method to compute the matching behavior of multiple current mirrors

Keywords

CMOS integrated circuits; constant current sources; neural nets; silicon-on-insulator; CMOS SOI transistors; matching properties; multiple current mirrors; neural networks; operating conditions; silicon-on-insulator CMOS technology; CMOS technology; Circuit testing; Computer networks; Concurrent computing; Isolation technology; Neural networks; Parallel processing; Semiconductor device measurement; Silicon on insulator technology; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronics for Neural Networks and Fuzzy Systems, 1994., Proceedings of the Fourth International Conference on

Conference_Location

Turin

Print_ISBN

0-8186-6710-9

Type

conf

DOI

10.1109/ICMNN.1994.593238

Filename

593238