DocumentCode
1932838
Title
Analog VLSI implementation of kernel-based classifiers
Author
Verleysen, M. ; Thissen, Ph ; Madrenas, J.
Author_Institution
Lab. de Microelectron., Univ. Catholique de Louvain, Belgium
fYear
1994
fDate
26-28 Sep 1994
Firstpage
138
Lastpage
144
Abstract
Kernel-based classifiers are neural networks (radial basis functions) where the probability densities of each class of data are first estimated, to be used thereafter to approximate Bayes boundaries between classes. Such an algorithm however involves a large number of operations, and its parallelism makes it an ideal candidate for a dedicated VLSI implementation. The authors present in this paper the architecture for a dedicated processor for kernel-based classifiers, and the implementation of the original cells
Keywords
VLSI; analogue processing circuits; feedforward neural nets; neural chips; pattern classification; probability; Bayes boundaries; analog VLSI implementation; dedicated VLSI implementation; kernel-based classifiers; neural networks; probability densities; radial basis functions; Analog computers; Analog memory; Circuits; Classification algorithms; Computer architecture; Kernel; Neural networks; Parallel processing; State estimation; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics for Neural Networks and Fuzzy Systems, 1994., Proceedings of the Fourth International Conference on
Conference_Location
Turin
Print_ISBN
0-8186-6710-9
Type
conf
DOI
10.1109/ICMNN.1994.593241
Filename
593241
Link To Document