FPGA- and Java-based rapid prototyping of a real-time H.264/AVC decoder

Author

Petrovsky, Alexander ; Parfieniuk, Marek ; Stankevich, Andrew ; Petrovsky, Alexander

Author_Institution

Dept. of Real-Time Syst., Bialystok Tech. Univ., Bialystok, Poland

fYear

2009

fDate

25-27 June 2009

Firstpage

629

Lastpage

634

Abstract

The paper reports on an attempt to implement a real-time hardware H.264 video decoder. The initial results of the project are presented, especially a customized RISC core and some digital modules, both of which have been implemented in Xilinx FPGA. The former has to serve as a host processor that supervises the latter, which speed up the essential decoding subtasks. The system is designed and tested based on a software decoder and diagnostic tool, which are implemented in Java using the object-oriented paradigm. Based on our experiences, we recommend the combination of FPGA and the Java platform as a good basis for rapid prototyping of advanced DSP algorithms.

Keywords

Java; code standards; decoding; field programmable gate arrays; object-oriented programming; program diagnostics; real-time systems; reduced instruction set computing; software prototyping; video coding; DSP algorithm; Java-based rapid prototyping; RISC core; Xilinx FPGA; object-oriented paradigm; real-time H.264/AVC decoder; software decoder; software diagnostic tool; Automatic voltage control; Decoding; Field programmable gate arrays; Hardware; Java; Prototypes; Reduced instruction set computing; Software testing; Software tools; System testing; H.264 decoder; Java; Plasma RISC; Xilinx FPGA;

fLanguage

English

Publisher

ieee

Conference_Titel

Mixed Design of Integrated Circuits & Systems, 2009. MIXDES '09. MIXDES-16th International Conference

Conference_Location

Lodz

Print_ISBN

978-1-4244-4798-5

Electronic_ISBN

978-83-928756-1-1

Type

conf

Filename

5289504