Title :
A 50–70GHz frequency doubler in 90nm CMOS
Author :
Chen, Jixin ; Yan, Pinpin ; Hong, Wei
Author_Institution :
State Key Lab. of Millimeter Waves, Southeast Univ., Nanjing, China
Abstract :
This paper presents the design and measurement of a V-band frequency doubler in 90nm IBM CMOS process. The doubler employs active multiplying architecture to generate harmonics of input fundamental signal, and distributed passive microstrip line to suppress unwanted signals. This doubler has the advantage of low power consumption, relatively low conversion loss, and simple topology for circuit design. The measured conversion loss is less than 11dB in a broad band frequency from 50 to 70GHz. The total DC power dissipation of this doubler is 4.5mW, and the chip size including pads is 0.4mm2.
Keywords :
CMOS integrated circuits; frequency measurement; frequency multipliers; millimetre wave integrated circuits; millimetre wave measurement; network synthesis; power consumption; DC power dissipation; IBM CMOS process; V-band frequency doubler measurement; circuit design topology; distributed passive microstrip line; frequency 50 GHz to 70 GHz; input fundamental signal harmonics; low conversion loss; power 4.5 mW; power consumption; size 90 nm; unwanted signal suppression; CMOS integrated circuits; Frequency conversion; Frequency measurement; Harmonic analysis; Logic gates; Microstrip; Power harmonic filters; CMOS; Frequency doubler;
Conference_Titel :
Microwave Workshop Series on Millimeter Wave Wireless Technology and Applications (IMWS), 2012 IEEE MTT-S International
Conference_Location :
Nanjing
Print_ISBN :
978-1-4673-0901-1
Electronic_ISBN :
978-1-4673-0903-5
DOI :
10.1109/IMWS2.2012.6338190
