Driving and image enhancement for CCD sensing image system

Author

Zhang, Mingyu ; Ren, Jianyue

Author_Institution

Grad. Sch., Changchun Inst. of Opt., Fine Mech. & Phys., Changchun, China

Volume

2

fYear

2010

fDate

9-11 July 2010

Firstpage

216

Lastpage

221

Abstract

The paper designs a driving circuit of high sensitive, wide dynamic for CCD sensing imaging system which adopts a Dalsa-made high resolution full-frame 33-mega pixels area CCD FTF5066M. Field Programmable Gate Array (FPGA) is used as the main detechniquevice to accomplish the timing design of the circuits and power driver control of the sensor. By using the Correlated Double Sampling (CDS) technique, the video noise is reduced and the SNR of the system is increased. The output rate of the imaging system designed with integrated chip can reach to 1.3 frames per second through bi-channel output. We use the histogram specification to adjust the brightness of the captured image. And then use the median filtering to suppress the noise. The traditional gray mean gradient (GMG) and the objective evaluation method based on Human Visual System (HVS) used to verify the effect of image enhancement.

Keywords

CCD image sensors; driver circuits; field programmable gate arrays; image denoising; image enhancement; image resolution; image sampling; median filters; CCD FTF5066M; CCD sensing image system; FPGA; HVS; SNR; correlated double sampling technique; driving circuit; field programmable gate array; gray mean gradient; human visual system; image enhancement; median filtering; noise suppression; power driver control; sensor; video noise reduction; Charge coupled devices; Histograms; Timing; CDS; FPGA; FTF5066M; image enhancement; median filtering;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer Science and Information Technology (ICCSIT), 2010 3rd IEEE International Conference on

Conference_Location

Chengdu

Print_ISBN

978-1-4244-5537-9

Type

conf

DOI

10.1109/ICCSIT.2010.5563816

Filename

5563816