A CMOS 8-bit two-step A/D converter with low power consumption

Author

Li, Xiaojuan ; Yang, Yintang ; Zhu, Zhangming

Author_Institution

Inst. of Microelectron., Xidian Univ., Xi´´an, China

fYear

2005

fDate

28-30 May 2005

Firstpage

44

Lastpage

47

Abstract

A low cost 8-bit A/D converter based on two-step flash topology is presented in this paper. The design, process technology, and performance of this A/D converter is described. In order to achieve high precision and low power, a corrected chopper-type comparator which can completed sampling comparison and subtraction has been introduced. The designed A/D converter is fabricated in 0.6 μm CMOS double-polysilicon and double-metal process technology and occupies an active area of 1.1 mm². The measurement results show that the design offers a 133 ns conversion time and dissipates only 6 mW power dissipation at 3 V power supply and 30 mW power dissipation at 5 V power supply separately with 5 MHz sampling rate.

Keywords

CMOS digital integrated circuits; analogue-digital conversion; choppers (circuits); comparators (circuits); integrated circuit design; low-power electronics; network topology; 3 V; 30 mW; 5 V; 6 mW; 8 bit; CMOS double-polysilicon technology; CMOS two-step A-D converter design; corrected chopper-type comparator; double-metal process technology; low power consumption; power dissipation; two-step flash topology; CMOS process; CMOS technology; Costs; Energy consumption; Power dissipation; Power measurement; Power supplies; Process design; Sampling methods; Topology;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Design and Video Technology, 2005. Proceedings of 2005 IEEE International Workshop on

Print_ISBN

0-7803-9005-9

Type

conf

DOI

10.1109/IWVDVT.2005.1504460

Filename

1504460