• DocumentCode
    1934519
  • Title

    VLSI design of Ethernet CSMA/CD physical layer in HUB based on FSM/VHDL and its simulation

  • Author

    Qian, Min ; Qiu-ping Huang ; Li, Wen-shi

  • Author_Institution
    Sch. of Electron. & Inf. Eng., Soochow Univ., Suzhou, China
  • fYear
    2005
  • fDate
    28-30 May 2005
  • Firstpage
    52
  • Lastpage
    54
  • Abstract
    In this paper, the physical layer of Ethernet CSMA/CD of HUB was designed with VHDL. The protocol of physical sub-layer of CSMA/CD was analyzed and the control circuits in HUB were designed with finite state machine (FSM). The whole system included port-controller, arbiter, clocks MUX, FIFO, core-controller and symbol generation and MUX. The functions of CSMA/CD were realized mainly by port-controller. Some parts of source programs were given out. The design was simulated in MAX+PLUS II tools under the clock frequency of 25 MHz. The simulated results demonstrate that the functions of physical sub-layer of CSMA/CD are realized.
  • Keywords
    VLSI; asynchronous circuits; carrier sense multiple access; finite state machines; integrated circuit design; local area networks; protocols; 25 MHz; Ethernet; MAX+PLUS II tools; VHDL; VLSI design; arbiter; carrier sensor multiaccess; clock frequency; collision detection; control circuits; core-controller; finite state machine; port-controller; protocol; symbol generation; Clocks; Computational modeling; Cyclic redundancy check; Ethernet networks; Multiaccess communication; Physical layer; Protocols; Switches; Transceivers; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design and Video Technology, 2005. Proceedings of 2005 IEEE International Workshop on
  • Print_ISBN
    0-7803-9005-9
  • Type

    conf

  • DOI
    10.1109/IWVDVT.2005.1504462
  • Filename
    1504462