DocumentCode
1934877
Title
Novel techniques for reducing self-heating effects in silicon-on-insulator power devices
Author
Roig, J. ; Flores, D. ; Vellvehi, M. ; Rebollo, J. ; Millan, J.
Author_Institution
Centro Nacional de Microelectron., CSIC, Barcelona, Spain
Volume
2
fYear
2001
fDate
37165
Firstpage
493
Abstract
Self-heating effects in Silicon-On-Insulator (SOI) power devices have become a serious problem when the active silicon layer thickness is reduced and buried oxide thickness is increased. In order to alleviate the self-heating, two novel techniques which lead to a better heat flow from active silicon layer to silicon substrate through the buried oxide layer in SOI power devices are proposed. No significant changes on device electrical characteristics are expected with the inclusion of the novel techniques. The electro-thermal performance of lateral power devices including the proposed techniques is also presented
Keywords
buried layers; power semiconductor devices; semiconductor device models; silicon-on-insulator; SOI power devices; Si-SiO; active silicon layer thickness; buried oxide thickness; heat flow; lateral power devices; multilayer insulator structures; nitride layers; self-heating effects; thermal conductivity; Electric variables; Insulation; Isolation technology; Nonhomogeneous media; Silicon on insulator technology; Substrates; Thermal conductivity; Thermal degradation; Voltage; Wafer bonding;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Conference, 2001. CAS 2001 Proceedings. International
Conference_Location
Sinaia
Print_ISBN
0-7803-6666-2
Type
conf
DOI
10.1109/SMICND.2001.967513
Filename
967513
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