Title :
Transputer supernodes: models for communication
Author :
Call, Duane B. ; Lloyd, G. Scott
Author_Institution :
Comput. Syst. Archit., Provo, UT, USA
fDate :
Feb. 27 1989-March 3 1989
Abstract :
A transputer supernode consists of multiple basic transputer nodes taken together as a unit, or of one or more of the basic nodes grouped with additional circuitry, providing for enhancements to the interprocessor communication capabilities of transputers alone. The authors explore methods for interconnecting relatively large numbers of transputers, say from 10 to 1000 or more. Consideration is given not only to various topologies but also to performance, namely communication latency and throughput, and how the computation process is affected by the communication process. Models of interprocessor communication are selected and compared based on existing and soon-to-be-available transputer and transputer-related technologies.<>
Keywords :
parallel processing; transputers; communication latency; interprocessor communication; multiple basic transputer nodes; throughput; transputer supernode; Bandwidth; Circuit analysis computing; Computer errors; Delay; Driver circuits; Error analysis; Logic circuits; Read-write memory; Timing; Writing;
Conference_Titel :
COMPCON Spring '89. Thirty-Fourth IEEE Computer Society International Conference: Intellectual Leverage, Digest of Papers.
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-8186-1909-0
DOI :
10.1109/CMPCON.1989.301903
