Title :
Hot carrier stress in deep submicrometer MOSFET´s
Author :
Cretu, B. ; Balestra, F. ; Ghibaudo, G.
Author_Institution :
Lab. de Phys. des Composants a Semicond., ENSERG, Grenoble, France
Abstract :
Hot carrier stress was performed for various bulk CMOS technologies. They underwent accelerated electrical stress by applying different gate biases and drain voltages in order to evaluate hot carrier degradation of the main electrical parameters. The worst case aging, device lifetime and maximum drain bias that can be applied are addressed
Keywords :
MOSFET; ageing; hot carriers; CMOS technology; aging; deep submicron MOSFET; device lifetime; drain bias; electrical parameters; hot carrier stress; CMOS technology; Charge carrier processes; Degradation; Hot carriers; Impact ionization; Interface states; MOSFET circuits; Stress; Substrates; Transconductance;
Conference_Titel :
Semiconductor Conference, 2001. CAS 2001 Proceedings. International
Conference_Location :
Sinaia
Print_ISBN :
0-7803-6666-2
DOI :
10.1109/SMICND.2001.967516
