Title :
Gate Oxide Breakdown in a SOI CMOS Process Usilng MESA Isolatioon
Author :
Haond, M. ; Le Neel, O. ; Mascarin, G. ; Gonchond, J.P.
Author_Institution :
CNET, BP98 38243 Meylan Cedex, France
Abstract :
We have studied the gate oxide breakdown behaviour in a CMOS process on SOI substrates, where the lateral isolation is obtained by the definition of individual islands (mesa) by using Reactive Ion Etching. Multiedge and edgeless transistors are compared to study the corner effects, such as early breakdown of the gate oxides. The breakdown voltage of the gate oxide at the corners has been improved by using an adequate local oxidation procedure of the edges of thc mesa, resulting in a softening of the upper corners of the mesa.
Keywords :
Breakdown voltage; CMOS process; Electric breakdown; Etching; Fabrication; Oxidation; Semiconductor films; Shape; Silicon on insulator technology; Substrates;
Conference_Titel :
Solid State Device Research Conference, 1989. ESSDERC '89. 19th European
Conference_Location :
Berlin, Germany