Title :
A 2.5 gb/s GaAs ATM Mux Demux ASIC
Author :
Madsen, J.K. ; Lassen, P.S.
Author_Institution :
Center for Broadband Telecommun., Tech. Univ., Lyngby, Denmark
fDate :
Oct. 29 1995-Nov. 1 1995
Abstract :
This paper describes the design and implementation of a high speed GaAs ATM Mux Demur ASIC (AMDA) which is the key element in a high speed ATM Add-Drop unit. This unit is used in a new distributed ATM multiplexing-demultiplexing architecture for broadband switching systems. The Add-Drop unit provides a cell based interface between networks/systems operating at different data rates, the high speed interface being 2.5 Gb/s and the low speed interface being 155/622 Mb/s. Self-timed FIFOs are used for handling the speed gaps between domains operating at different clock rates, and a Self-Timed At Receiver´s Input (STARI) interface is used at all high speed chip-to-chip links to eliminate timing skews The AMDA demonstrated operation above 4 Gb/s (500 MHz clock frequency) with an associated power dissipation of 5 W.
Keywords :
B-ISDN; III-V semiconductors; MESFET integrated circuits; application specific integrated circuits; asynchronous transfer mode; demultiplexing equipment; direct coupled FET logic; field effect digital integrated circuits; field effect logic circuits; gallium arsenide; multiplexing equipment; 2.5 to 4 Gbit/s; 500 MHz; ATM mux/demux ASIC; GaAs; STARI interface; broadband switching systems; cell based interface; distributed multiplexing-demultiplexing architecture; high speed ATM add-drop unit; high speed interface; low speed interface; self timed FIFOs; self timed at receiver input; Application specific integrated circuits; Appropriate technology; Asynchronous transfer mode; Bandwidth; CMOS technology; Clocks; Electromagnetics; Gallium arsenide; Media Access Protocol; Switches;
Conference_Titel :
Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1995. Technical Digest 1995., 17th Annual IEEE
Conference_Location :
San Diego, CA, USA
Print_ISBN :
0-7803-2966-X
DOI :
10.1109/GAAS.1995.528957