A low-power, robust multi-modulus frequency divider for automotive radio applications

This paper presents a multi-modulus frequency divider for a fractional-N PLL in an 868 MHz automotive radio transmission system. The circuit employs a reverse phase switching prescaler and provides 8 division ratios from 105 to 112. A power-aware sizing methodology for high-speed current mode logic circuits and an active replica biasing technique enable low power operation from 2.2 mW to 6.8 mW within a wide supply voltage range from 1.8 V to 3.6 V in battery powered applications. Design verification is performed using simulations on circuit and system level that consider statistic mismatch properties and their influence on the radio transmitter spectral characteristics. The circuit is implemented using a 0.35 mum high-voltage CMOS process, which underlines that automotive semiconductor technologies are suitable for the implementation of cost-efficient radio transmitters.