DocumentCode
1936893
Title
"Watts" the matter: power reduction issues
Author
Correale, Anthony, Jr.
Author_Institution
Microelectron. Div., IBM Corp., NC, USA
fYear
2001
fDate
2001
Firstpage
9
Lastpage
10
Abstract
Technology continues to shrink lithographic images producing smaller chips which require lower voltages. The lower voltage has helped the overall power dissipation per device, but the number of devices that can be integrated has increased by a faster rate. The result is often power-constrained designs. To help alleviate the explosion in power, designers have been faced with many design challenges. Clock power management is now the norm with multiple operation modes. On-board dynamic frequency adjustment and temperature detectors are now employed to ensure that the product does not exceed its maximum thermal limits. Another aspect of power management is the use of multiple voltages. The author discusses power management from a packaging perspective and concludes that power efficiency has become a mandate for success
Keywords
integrated circuit design; integrated circuit packaging; low-power electronics; DC power; SoC; clock power management; leakage power; maximum thermal limits; multiple operation modes; multiple power supply pins; multiple voltages; on-board dynamic frequency adjustment; packaging perspective; power dissipation; power efficiency; power efficient design; power management; power-constrained designs; temperature detectors; wireless applications; Clocks; Detectors; Energy management; Explosions; Face detection; Frequency; Packaging; Power dissipation; Temperature; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Performance of Electronic Packaging, 2001
Conference_Location
Cambridge, MA
Print_ISBN
0-7803-7024-4
Type
conf
DOI
10.1109/EPEP.2001.967599
Filename
967599
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