Title :
Regulated capacitance multiplier in CMOS technology
Author_Institution :
Dept. of Electr. Eng., Tech. Univ. of Czestochowa, Czestochowa, Poland
Abstract :
An active realization of the large value capacitance on chip in CMOS technology is described in the paper. Thanks to the application of the regulated gain current amplifier, the resulting capacitance multiplying factor can be varied in the range of tens of picofarads to several nanofarads. The circuit designed in 0.35 mum technology is supplied with +/-1.25 V voltages, and the power consumed by the circuit varies from 20 nW to 2 muW, depending on the realized capacitance value. The performance of the circuit is verified with SPICE simulations.
Keywords :
CMOS integrated circuits; amplifiers; capacitance; multiplying circuits; CMOS technology; SPICE simulations; capacitance multiplying factor; regulated capacitance multiplier; regulated gain current amplifier; Active filters; CMOS technology; Capacitance; Capacitors; Differential amplifiers; Equations; Frequency; Integrated circuit technology; Paper technology; Transconductance; Low frequency filters; capacitance multipliers; medical implants;
Conference_Titel :
Mixed Design of Integrated Circuits & Systems, 2009. MIXDES '09. MIXDES-16th International Conference
Conference_Location :
Lodz
Print_ISBN :
978-1-4244-4798-5
Electronic_ISBN :
978-83-928756-1-1
