• DocumentCode
    1937118
  • Title

    Analysis of the Specific ON-resistance in Conventional VDMOS Transistors

  • Author

    Fernandez, J. ; Paredes, J. ; Hidalgo, S. ; Domínguez, C. ; Berta, F. ; Rebollo, J. ; Millan, J.

  • Author_Institution
    Centro Nacional de Microelectrónica (CNM), CSIC-UAB, 08193 Bellaterra., Barcelona. Spain.
  • fYear
    1989
  • fDate
    11-14 Sept. 1989
  • Firstpage
    531
  • Lastpage
    534
  • Abstract
    A distributed modellization of the specific ON-resistance is experimentally corroborated for VDMOS transistors with different cellular designs. The results for low voltage capability devices show differences for the optinmum percentage of the cell area outside the body at which the minimum of the specific ON-resistance occurs and for this minimum value compared with previous formulations. In addition, a new VDMOS design with a waved gate electrode is reported, which seems to be attractive for medium voltage applications.
  • Keywords
    Analytical models; Constraint optimization; Current density; Driver circuits; Electrodes; Epitaxial layers; Immune system; Low voltage; Medium voltage; Semiconductor process modeling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid State Device Research Conference, 1989. ESSDERC '89. 19th European
  • Conference_Location
    Berlin, Germany
  • Print_ISBN
    0387510001
  • Type

    conf

  • Filename
    5436551
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1937118